Update register names

This commit is contained in:
2025-07-30 12:04:46 +02:00
parent f0e9fbc52c
commit d04f457c9f
2 changed files with 53 additions and 49 deletions

View File

@@ -1,9 +1,10 @@
use bitflags::bitflags;
bitflags! {
// Configuration Register
// Address 0x00002000, Reset: 0x00080000, Name: AFECON
#[derive(Clone, Copy)]
pub struct ConfigurationRegister: u32 {
pub struct AFECON: u32 {
const DACBUFEN = 1 << 21;
const DACREFEN = 1 << 20;
const SINC2EN = 1 << 16;
@@ -22,10 +23,11 @@ bitflags! {
}
bitflags! {
// Switch Matrix Configuration Register
// Address 0x0000200C, Reset: 0x00000000, Name: SWCON
#[derive(Clone, Copy)]
#[derive(PartialEq)]
pub struct SwitchMatrixConfigurationRegister: u32 {
pub struct SWCON: u32 {
const NMUXCON_MSK = 0b1111 << 8;
const NMUXCON_N2 = 0b0010 << 8; // N2 switch
const NMUXCON_N5 = 0b0101 << 8; // N5 switch
@@ -38,8 +40,9 @@ bitflags! {
}
bitflags! {
// Waveform Generator Configuration Register
// Address 0x00002014, Reset: 0x00000030, Name: WGCON
pub struct WaveformGeneratorConfigurationRegister: u32 {
pub struct WGCON: u32 {
const reset = 0x00000030;
const DACGAINCAL = 1 << 5;
const DACOFFSETCAL = 1 << 4;
@@ -51,8 +54,9 @@ bitflags! {
}
bitflags! {
// ADC Configuration Register,
// Address 0x000021A8, Reset: 0x00000000, Name: ADCCON
pub struct ADCConfigurationRegister: u32 {
pub struct ADCCON: u32 {
const GNPGA_1_5 = 1 << 16;
const MUXSELN_TEMP = 0b01011 << 8;
const MUXSELP_TEMP = 0b01011;