mirror of
https://github.com/hubaldv/bioz-firmware-rs.git
synced 2025-12-06 05:01:18 +00:00
952 lines
40 KiB
Rust
952 lines
40 KiB
Rust
use defmt::{info, error};
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use embassy_stm32::spi::Error;
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use embassy_stm32::exti::ExtiInput;
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use embassy_sync::blocking_mutex::raw::ThreadModeRawMutex;
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use embassy_sync::channel::Channel;
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use embassy_sync::mutex::Mutex;
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use embassy_time::Timer;
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use static_cell::StaticCell;
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use heapless::Vec;
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use num::complex::Complex;
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use crate::ad5940::*;
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use crate::ad5940_registers::*;
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use bioz_icd_rs::{SingleImpedanceOutput, IcdDftNum, ImpedanceInitError, MeasurementPointSet, SweepImpedanceOutput};
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use crate::icd_mapping::IntoDftnum;
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pub static IMPEDANCE_CHANNEL_SINGLE: Channel<ThreadModeRawMutex, SingleImpedanceOutput, 50> = Channel::new();
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pub static IMPEDANCE_CHANNEL_SWEEP: Channel<ThreadModeRawMutex, SweepImpedanceOutput, 5> = Channel::new();
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pub type ImpedanceSetupType = Mutex<ThreadModeRawMutex, ImpedanceSetup>;
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pub static IMPEDANCE_SETUP: StaticCell<ImpedanceSetupType> = StaticCell::new();
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pub const RCAL: f32 = 1008.0; // Calibration resistor in Ohm
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#[derive(PartialEq, Copy, Clone)]
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pub enum RunningMode {
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None,
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SingleFrequency2Lead,
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SingleFrequency4Lead,
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SweepFrequency2Lead(MeasurementPointSet),
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SweepFrequency4Lead(MeasurementPointSet),
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}
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pub enum RtiaCalibrated {
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None,
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Single(RtiaCalibrationResult),
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Vec8(Vec<RtiaCalibrationResult, 8>),
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Vec18(Vec<RtiaCalibrationResult, 18>),
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}
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#[derive(Debug, Clone, Copy, PartialEq)]
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pub struct RtiaCalibrationResult {
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pub magnitude: f32,
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pub phase: f32,
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}
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pub struct ImpedanceSetup {
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ad5940: AD5940,
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dsp_config: Option<DspConfig>,
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pub running_mode: RunningMode,
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pub rtia_calibrated: RtiaCalibrated,
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}
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impl ImpedanceSetup {
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pub fn new(ad5940: AD5940) -> Self {
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ImpedanceSetup { ad5940, dsp_config: None, running_mode: RunningMode::None, rtia_calibrated: RtiaCalibrated::None }
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}
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pub async fn init(&mut self) -> Result<(), Error> {
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// AFECON:
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self.ad5940.afecon(
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AFECON::DACBUFEN
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| AFECON::DACREFEN
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| AFECON::SINC2EN
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| AFECON::TIAEN
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| AFECON::INAMPEN
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| AFECON::EXBUFEN
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| AFECON::DACEN,
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true,
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)
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.await;
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// Set CLK configuration
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let clk_config = ClkConfig::default()
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.adcclkdiv(ADCCLKDIV::DIV1) // ADCCLK = 32MHz
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.sysclkdiv(SYSCLKDIV::DIV2) // SYSCLK = 16MHz
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.clk32mhzen(CLK32MHZEN::MHz32);
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self.ad5940.apply_clk_config(&clk_config).await.unwrap();
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// Configure LP DAC and TIA
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self.common_mode_output_enable(false).await.unwrap();
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// Set DSP configuration
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let mut dsp_config = DspConfig::default();
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dsp_config
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.gnpgain(GNPGAIN::Gain1)
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.adc_mux_n(MUXSELN::HsTiaNeg)
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.adc_mux_p(MUXSELP::HsTiaPos)
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.ctiacon(CTIACON::C32)
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.rtiacon(RTIACON::R1k)
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.sinc3osr(SINC3OSR::R4)
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.sinc2osr(SINC2OSR::R178)
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.adcsamplerate(ADCSAMPLERATE::R1_6MHz)
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.dftin_sel(DFTINSEL::GainOffset)
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.dftnum(DFTNUM::Num4096)
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.hanning(true)
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.set_clks(16_000_000, 32_000_000); // Check clk_config: In this case SYSCLK = 16MHz and ADCCLK = 32MHz
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self.ad5940.apply_dsp_config(&dsp_config).await.unwrap();
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self.dsp_config = Some(dsp_config);
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// Set SRAM configuration (cmd and data sram)
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let mut sram_config = SramConfig::default();
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sram_config
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.datafifosrcsel(DATAFIFOSRCSEL::DFT)
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.datafifoen(DATAFIFOEN::Normal)
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.data_size(DATA_MEM_SEL::Size2kB)
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.cmd_mode(CMDMEMMDE::MemoryMode)
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.cmd_size(CMD_MEM_SEL::Size2kB);
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self.ad5940.apply_sram_config(sram_config).await.unwrap();
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// WGCON: set sinus output
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let config_wgcon = WGCON::TYPESEL_SIN.bits();
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self.ad5940.write_reg(Register::WGCON, config_wgcon).await.unwrap();
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Ok(())
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}
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pub async fn calibrate_rtia(&mut self, frequency: u32, wait_time: u32) -> Result<RtiaCalibrationResult, Error> {
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/* CALIBRATION METHOD
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1) Measure the complex voltage V_Rcal across the calibration DUT (Rcal).
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2) Measure the complex voltage V_Rtia across Rtia [HSTIA_P (output) - HSTIA_N].
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3) Note Rtia carries the same current as Rcal; I_Rtia = I_exc = I_Rcal
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4) Implement the equation: Rtia = V_Rtia / I_Rtia
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--> Rtia = (V_Rtia / V_Rcal) * Rcal
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*/
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// self.ad5940.hsr_calibrate_rtia(wait_time).await;
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self.ad5940.wgfcw(frequency).await;
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let wg_amplitude = 2047; // 2047 is the maximum amplitude for a 12-bit DAC --> 1.62V peak-to-peak
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self.ad5940.write_reg(Register::WGAMPLITUDE, wg_amplitude).await.unwrap();
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// Switches for Rcal
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let switch_config = SwitchConfig::default()
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.t9con(T9CON::T9Closed)
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.tmuxcon(TMUXCON::TR1Closed)
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.nmuxcon(NMUXCON::NR1Closed)
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.pmuxcon(PMUXCON::PR0Closed)
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.dmuxcon(DMUXCON::DR0Closed);
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self.ad5940.apply_switch_config(switch_config).await.unwrap();
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// Voltage measurement Rcal
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self.dsp_config.as_mut().unwrap()
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.adc_mux_n(MUXSELN::ExciNNode)
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.adc_mux_p(MUXSELP::ExciPNode);
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self.ad5940.apply_dsp_config(self.dsp_config.as_ref().unwrap()).await.unwrap();
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self.ad5940.afecon(AFECON::WAVEGENEN | AFECON::ADCEN, true).await;
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// self.ad5940.sequencer_wait(16*10).await; // 10 us based on SYSCLK = 16MHz
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Timer::after_micros(10).await;
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self.ad5940.afecon(AFECON::ADCCONVEN | AFECON::DFTEN, true).await;
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// self.ad5940.sequencer_wait(wait_time).await; // Determined above
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// self.ad5940.sequencer_wait(16*20).await; // 20 us based on SYSCLK = 16MHz
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Timer::after_micros((wait_time/16) as u64).await;
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Timer::after_micros(20).await;
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self.ad5940.afecon(AFECON::WAVEGENEN | AFECON:: ADCEN | AFECON::ADCCONVEN | AFECON::DFTEN, false).await;
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let real_raw = self.ad5940.read_reg(Register::DFTREAL).await.unwrap();
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let imag_raw = self.ad5940.read_reg(Register::DFTIMAG).await.unwrap();
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let mut rcal = Complex::new(
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sign_extend_18bit(real_raw) as f32,
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sign_extend_18bit(imag_raw) as f32
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);
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// Voltage measurement Rtia
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self.dsp_config.as_mut().unwrap()
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.adc_mux_n(MUXSELN::HsTiaNeg)
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.adc_mux_p(MUXSELP::HsTiaPos);
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self.ad5940.apply_dsp_config(self.dsp_config.as_ref().unwrap()).await.unwrap();
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self.ad5940.afecon(AFECON::WAVEGENEN | AFECON::ADCEN, true).await;
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// self.ad5940.sequencer_wait(16*10).await; // 10 us based on SYSCLK = 16MHz
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Timer::after_micros(10).await;
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self.ad5940.afecon(AFECON::ADCCONVEN | AFECON::DFTEN, true).await;
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// self.ad5940.sequencer_wait(wait_time).await; // Determined above
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// self.ad5940.sequencer_wait(16*20).await; // 20 us based on SYSCLK = 16MHz
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Timer::after_micros((wait_time/16) as u64).await;
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Timer::after_micros(20).await;
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self.ad5940.afecon(AFECON::WAVEGENEN | AFECON:: ADCEN | AFECON::ADCCONVEN | AFECON::DFTEN, false).await;
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let real_raw = self.ad5940.read_reg(Register::DFTREAL).await.unwrap();
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let imag_raw = self.ad5940.read_reg(Register::DFTIMAG).await.unwrap();
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let mut rtia = Complex::new(
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sign_extend_18bit(real_raw) as f32,
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sign_extend_18bit(imag_raw) as f32
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);
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// Current is measured inverted in rtia
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rtia.re *= -1.0;
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rtia.im *= -1.0;
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// Impedance imaginary part is measured inverted
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rcal.im *= -1.0;
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rtia.im *= -1.0;
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// Rtia = (V_Rtia / V_Rcal) * Rcal
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let mut temp = rtia/rcal;
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temp = temp.scale(RCAL);
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// Calibration result
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let calibration_result = RtiaCalibrationResult {
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magnitude: temp.norm(), // Magnitude in Ohm
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phase: temp.arg(), // Phase in radians
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};
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Ok(calibration_result)
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}
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async fn calibrate_rtia_multiple<const N: usize>(&mut self, number_of_points: MeasurementPointSet) -> Result<Vec<RtiaCalibrationResult, N>, ImpedanceInitError> {
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let mut results = Vec::<RtiaCalibrationResult, N>::new();
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// Set DFT number based on the frequency
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for &frequency in number_of_points.values() {
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// Determine wait time
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let selected_dft_num = match frequency {
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f if f < 10 => DFTNUM::Num16384,
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f if f < 100 => DFTNUM::Num16384,
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f if f < 250 => DFTNUM::Num8192,
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f if f < 1000 => DFTNUM::Num4096,
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f if f < 2500 => DFTNUM::Num2048,
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f if f < 10000 => DFTNUM::Num1024,
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f if f < 25000 => DFTNUM::Num512,
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f if f < 100000 => DFTNUM::Num256,
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_ => DFTNUM::Num128,
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};
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let wait_time: u32;
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if let Some(dsp_config) = &mut self.dsp_config {
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dsp_config
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.dftnum(selected_dft_num);
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// Update DFTNUM
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let mut current = self.ad5940.read_reg(Register::DFTCON).await.unwrap();
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current = DFTNUM::apply(current, selected_dft_num as u32);
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self.ad5940.write_reg(Register::DFTCON, current).await.unwrap();
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wait_time = self.ad5940.sequencer_calculate_wait_time(&dsp_config).await.unwrap();
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// Calibrate Rtia at the given frequency
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let calibration_result = self.calibrate_rtia(frequency, wait_time).await.unwrap();
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results.push(calibration_result).unwrap();
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} else {
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error!("DSP configuration not set, cannot calculate wait time");
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return Err(ImpedanceInitError::DSPNotSet);
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}
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}
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Ok(results)
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}
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pub async fn common_mode_output_enable(&mut self, enable: bool) -> Result<(), Error> {
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// Configure LP DAC and TIA
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let mut lp_config = LpConfig::default();
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if enable {
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lp_config
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.data_reset(true)
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.power_enable(true)
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.data_6bit(31) // Mid-scale for 6-bit DAC
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.common_mode_enable(true)
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.tia_switches_enabled(1 << 5 | 1 << 7 | 1 << 9 | 1 << 13)
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.tia_enable(true)
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.filter_resistor(TIARF::R20k);
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} else {
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lp_config
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.power_enable(false)
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.common_mode_enable(false)
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.tia_enable(false);
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}
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self.ad5940.apply_lp_config(&lp_config).await.unwrap();
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Ok(())
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}
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pub async fn init_single_frequency_measurement_2_lead(&mut self, frequency: u32, dft_number: IcdDftNum) -> Result<f32, ImpedanceInitError> {
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// Configure LP DAC and TIA
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self.common_mode_output_enable(false).await.unwrap();
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// Reset FIFO
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self.ad5940.clear_and_enable_fifo().await.unwrap();
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// Set DFT number
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self.dsp_config.as_mut().unwrap().dftnum(dft_number.into_dftnum());
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self.ad5940.apply_dsp_config(self.dsp_config.as_ref().unwrap()).await.unwrap();
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// Configure GPIOs
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self.ad5940.write_reg(Register::GP0CON, 0b10 << 4 | 0b10 << 2 | 0b10).await.unwrap();
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self.ad5940.write_reg(Register::SYNCEXTDEVICE, 0b111).await.unwrap();
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// Calculate wait time between measurement start and stop
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let wait_time;
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let sinus_periods_per_dft;
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if let Some(dsp_config) = &self.dsp_config {
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wait_time = self.ad5940.sequencer_calculate_wait_time(dsp_config).await.unwrap();
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sinus_periods_per_dft = wait_time as f32 / dsp_config.fsys.unwrap() as f32 * frequency as f32;
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// info!("Sinus periods per DFT: {}", sinus_periods_per_dft);
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} else {
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error!("DSP configuration not set, cannot calculate wait time");
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return Err(ImpedanceInitError::DSPNotSet);
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}
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// Configure sequencer
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self.ad5940.sequencer_enable(true).await;
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self.ad5940.wgfcw(frequency).await;
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let wg_amplitude = 2047; // 2047 is the maximum amplitude for a 12-bit DAC --> 1.62V peak-to-peak
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self.ad5940.write_reg(Register::WGAMPLITUDE, wg_amplitude).await.unwrap();
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// Rcal
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let switch_config = SwitchConfig::default()
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.t9con(T9CON::T9Closed)
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.tmuxcon(TMUXCON::TR1Closed)
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.nmuxcon(NMUXCON::NR1Closed)
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.pmuxcon(PMUXCON::PR0Closed)
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.dmuxcon(DMUXCON::DR0Closed);
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self.ad5940.apply_switch_config(switch_config).await.unwrap();
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self.ad5940.afecon(AFECON::WAVEGENEN | AFECON::ADCEN, true).await;
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self.ad5940.sequencer_wait(16*10).await; // 10 us based on SYSCLK = 16MHz
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self.ad5940.afecon(AFECON::ADCCONVEN | AFECON::DFTEN, true).await;
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self.ad5940.sequencer_wait(wait_time).await; // Determined above
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self.ad5940.sequencer_wait(16*20).await; // 20 us based on SYSCLK = 16MHz
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self.ad5940.afecon(AFECON::WAVEGENEN | AFECON:: ADCEN | AFECON::ADCCONVEN | AFECON::DFTEN, false).await;
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// Rz
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let switch_config = SwitchConfig::default()
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.t9con(T9CON::T9Closed)
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.tmuxcon(TMUXCON::T2Closed)
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.nmuxcon(NMUXCON::N2Closed)
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.pmuxcon(PMUXCON::P11Closed)
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.dmuxcon(DMUXCON::D5Closed);
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self.ad5940.apply_switch_config(switch_config).await.unwrap();
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self.ad5940.afecon(AFECON::WAVEGENEN | AFECON::ADCEN, true).await;
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self.ad5940.sequencer_wait(16*10).await; // 10 us based on SYSCLK = 16MHz
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self.ad5940.afecon(AFECON::ADCCONVEN | AFECON::DFTEN, true).await;
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self.ad5940.sequencer_wait(wait_time).await; // Determined above
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self.ad5940.sequencer_wait(16*20).await; // 20 us based on SYSCLK = 16MHz
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self.ad5940.afecon(AFECON::WAVEGENEN | AFECON:: ADCEN | AFECON::ADCCONVEN | AFECON::DFTEN, false).await;
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// Toggle leds
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self.ad5940.write_reg(Register::SYNCEXTDEVICE, 0b010).await.unwrap();
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self.ad5940.sequencer_wait(16 * 1_000).await; // 1ms based on SYSCLK = 16MHz
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self.ad5940.write_reg(Register::SYNCEXTDEVICE, 0b111).await.unwrap();
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self.ad5940.sequencer_enable(false).await;
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// Write sequence to SRAM
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let start_address = 0;
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self.ad5940.sequencer_cmd_write(start_address).await;
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self.ad5940.sequencer_info_configure(0, self.ad5940.seq_len, start_address).await;
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self.start_measurement().await;
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Ok(sinus_periods_per_dft)
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}
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pub async fn init_single_frequency_measurement_4_lead(&mut self, frequency: u32, dft_number: IcdDftNum) -> Result<f32, ImpedanceInitError> {
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// Configure LP DAC and TIA
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self.common_mode_output_enable(true).await.unwrap();
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// Reset FIFO
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self.ad5940.clear_and_enable_fifo().await.unwrap();
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// Set DFT number
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self.dsp_config.as_mut().unwrap().dftnum(dft_number.into_dftnum());
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self.ad5940.apply_dsp_config(self.dsp_config.as_ref().unwrap()).await.unwrap();
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// Configure GPIOs
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self.ad5940.write_reg(Register::GP0CON, 0b10 << 4 | 0b10 << 2 | 0b10).await.unwrap();
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self.ad5940.write_reg(Register::SYNCEXTDEVICE, 0b111).await.unwrap();
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// Calculate wait time between measurement start and stop
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let wait_time;
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let sinus_periods_per_dft;
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if let Some(dsp_config) = &self.dsp_config {
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wait_time = self.ad5940.sequencer_calculate_wait_time(dsp_config).await.unwrap();
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sinus_periods_per_dft = wait_time as f32 / dsp_config.fsys.unwrap() as f32 * frequency as f32;
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// info!("Sinus periods per DFT: {}", sinus_periods_per_dft);
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} else {
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error!("DSP configuration not set, cannot calculate wait time");
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return Err(ImpedanceInitError::DSPNotSet);
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}
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// Calibrate Rtia
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match self.calibrate_rtia(frequency, wait_time).await {
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Ok(calibration_result) => {
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self.rtia_calibrated = RtiaCalibrated::Single(calibration_result);
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},
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Err(e) => {
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error!("Rtia calibration failed: {:?}", e);
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}
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}
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// Configure switches
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let switch_config = SwitchConfig::default()
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.t9con(T9CON::T9Closed)
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.tmuxcon(TMUXCON::T2Closed)
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|
.nmuxcon(NMUXCON::N2Closed)
|
|
.pmuxcon(PMUXCON::P11Closed)
|
|
.dmuxcon(DMUXCON::D5Closed);
|
|
self.ad5940.apply_switch_config(switch_config).await.unwrap();
|
|
|
|
// Configure sequencer
|
|
self.ad5940.sequencer_enable(true).await;
|
|
|
|
self.ad5940.wgfcw(frequency).await;
|
|
let wg_amplitude = 2047; // 2047 is the maximum amplitude for a 12-bit DAC --> 1.62V peak-to-peak
|
|
self.ad5940.write_reg(Register::WGAMPLITUDE, wg_amplitude).await.unwrap();
|
|
|
|
// Voltage measurement
|
|
self.dsp_config.as_mut().unwrap()
|
|
.adc_mux_n(MUXSELN::AIN3)
|
|
.adc_mux_p(MUXSELP::AIN2);
|
|
// self.dsp_config.as_mut().unwrap()
|
|
// .adc_mux_n(MUXSELN::AIN1)
|
|
// .adc_mux_p(MUXSELP::CE0);
|
|
self.ad5940.apply_dsp_config(self.dsp_config.as_ref().unwrap()).await.unwrap();
|
|
|
|
self.ad5940.afecon(AFECON::WAVEGENEN | AFECON::ADCEN, true).await;
|
|
self.ad5940.sequencer_wait(16*10).await; // 10 us based on SYSCLK = 16MHz
|
|
self.ad5940.afecon(AFECON::ADCCONVEN | AFECON::DFTEN, true).await;
|
|
self.ad5940.sequencer_wait(wait_time).await; // Determined above
|
|
self.ad5940.sequencer_wait(16*20).await; // 20 us based on SYSCLK = 16MHz
|
|
self.ad5940.afecon(AFECON::WAVEGENEN | AFECON:: ADCEN | AFECON::ADCCONVEN | AFECON::DFTEN, false).await;
|
|
|
|
// Current measurement
|
|
self.dsp_config.as_mut().unwrap()
|
|
.adc_mux_n(MUXSELN::HsTiaNeg)
|
|
.adc_mux_p(MUXSELP::HsTiaPos);
|
|
self.ad5940.apply_dsp_config(self.dsp_config.as_ref().unwrap()).await.unwrap();
|
|
|
|
self.ad5940.afecon(AFECON::WAVEGENEN | AFECON::ADCEN, true).await;
|
|
self.ad5940.sequencer_wait(16*10).await; // 10 us based on SYSCLK = 16MHz
|
|
self.ad5940.afecon(AFECON::ADCCONVEN | AFECON::DFTEN, true).await;
|
|
self.ad5940.sequencer_wait(wait_time).await; // Determined above
|
|
self.ad5940.sequencer_wait(16*20).await; // 20 us based on SYSCLK = 16MHz
|
|
self.ad5940.afecon(AFECON::WAVEGENEN | AFECON:: ADCEN | AFECON::ADCCONVEN | AFECON::DFTEN, false).await;
|
|
|
|
// Toggle leds
|
|
self.ad5940.write_reg(Register::SYNCEXTDEVICE, 0b010).await.unwrap();
|
|
self.ad5940.sequencer_wait(16 * 1_000).await; // 1ms based on SYSCLK = 16MHz
|
|
self.ad5940.write_reg(Register::SYNCEXTDEVICE, 0b111).await.unwrap();
|
|
|
|
self.ad5940.sequencer_enable(false).await;
|
|
|
|
// Write sequence to SRAM
|
|
let start_address = 0;
|
|
self.ad5940.sequencer_cmd_write(start_address).await;
|
|
|
|
self.ad5940.sequencer_info_configure(0, self.ad5940.seq_len, start_address).await;
|
|
|
|
self.start_measurement().await;
|
|
|
|
Ok(sinus_periods_per_dft)
|
|
}
|
|
|
|
pub async fn init_sweep_frequency_measurement_2_lead<const N: usize>(&mut self, number_of_points: MeasurementPointSet) -> Result<heapless::Vec<f32, N>, ImpedanceInitError> {
|
|
// Configure LP DAC and TIA
|
|
self.common_mode_output_enable(false).await.unwrap();
|
|
|
|
// Create vector to store the periods per DFT for each frequency
|
|
let mut periods_per_dft_vec = heapless::Vec::<f32, N>::new();
|
|
|
|
// Reset FIFO
|
|
self.ad5940.clear_and_enable_fifo().await.unwrap();
|
|
|
|
// Configure GPIOs
|
|
self.ad5940.write_reg(Register::GP0CON, 0b10 << 4 | 0b10 << 2 | 0b10).await.unwrap();
|
|
self.ad5940.write_reg(Register::SYNCEXTDEVICE, 0b111).await.unwrap();
|
|
|
|
// Configure sequencer
|
|
self.ad5940.sequencer_enable(true).await;
|
|
|
|
// Set DFT number based on the frequency
|
|
for &frequency in number_of_points.values() {
|
|
// Determine wait time
|
|
let selected_dft_num = match frequency {
|
|
f if f < 10 => DFTNUM::Num16384,
|
|
f if f < 100 => DFTNUM::Num16384,
|
|
f if f < 250 => DFTNUM::Num8192,
|
|
f if f < 1000 => DFTNUM::Num4096,
|
|
f if f < 2500 => DFTNUM::Num2048,
|
|
f if f < 10000 => DFTNUM::Num1024,
|
|
f if f < 25000 => DFTNUM::Num512,
|
|
f if f < 100000 => DFTNUM::Num256,
|
|
_ => DFTNUM::Num128,
|
|
};
|
|
|
|
let wait_time: u32;
|
|
|
|
if let Some(dsp_config) = &mut self.dsp_config {
|
|
dsp_config
|
|
.dftnum(selected_dft_num);
|
|
|
|
// Update DFTNUM
|
|
let mut current = self.ad5940.read_reg(Register::DFTCON).await.unwrap();
|
|
current = DFTNUM::apply(current, selected_dft_num as u32);
|
|
self.ad5940.write_reg(Register::DFTCON, current).await.unwrap();
|
|
|
|
wait_time = self.ad5940.sequencer_calculate_wait_time(&dsp_config).await.unwrap();
|
|
let periods_per_dft = wait_time as f32 / dsp_config.fsys.unwrap() as f32 * frequency as f32;
|
|
|
|
periods_per_dft_vec.push(periods_per_dft).unwrap();
|
|
// info!("{}Hz: Sinus periods per DFT: {}", frequency, periods_per_dft);
|
|
|
|
} else {
|
|
error!("DSP configuration not set, cannot calculate wait time");
|
|
return Err(ImpedanceInitError::DSPNotSet);
|
|
}
|
|
|
|
// Set frequency
|
|
self.ad5940.wgfcw(frequency as u32).await;
|
|
let wg_amplitude = 2047; // 2047 is the maximum amplitude for a 12-bit DAC --> 1.62V peak-to-peak
|
|
self.ad5940.write_reg(Register::WGAMPLITUDE, wg_amplitude).await.unwrap();
|
|
|
|
// Rcal
|
|
let switch_config = SwitchConfig::default()
|
|
.t9con(T9CON::T9Closed)
|
|
.tmuxcon(TMUXCON::TR1Closed)
|
|
.nmuxcon(NMUXCON::NR1Closed)
|
|
.pmuxcon(PMUXCON::PR0Closed)
|
|
.dmuxcon(DMUXCON::DR0Closed);
|
|
self.ad5940.apply_switch_config(switch_config).await.unwrap();
|
|
self.ad5940.afecon(AFECON::WAVEGENEN | AFECON::ADCEN, true).await;
|
|
self.ad5940.sequencer_wait(16*10).await; // 10 us based on SYSCLK = 16MHz
|
|
self.ad5940.afecon(AFECON::ADCCONVEN | AFECON::DFTEN, true).await;
|
|
self.ad5940.sequencer_wait(wait_time).await; // Determined above
|
|
self.ad5940.sequencer_wait(16*20).await; // 20 us based on SYSCLK = 16MHz
|
|
self.ad5940.afecon(AFECON::WAVEGENEN | AFECON:: ADCEN | AFECON::ADCCONVEN | AFECON::DFTEN, false).await;
|
|
|
|
// Rz
|
|
let switch_config = SwitchConfig::default()
|
|
.t9con(T9CON::T9Closed)
|
|
.tmuxcon(TMUXCON::T2Closed)
|
|
.nmuxcon(NMUXCON::N2Closed)
|
|
.pmuxcon(PMUXCON::P11Closed)
|
|
.dmuxcon(DMUXCON::D5Closed);
|
|
self.ad5940.apply_switch_config(switch_config).await.unwrap();
|
|
self.ad5940.afecon(AFECON::WAVEGENEN | AFECON::ADCEN, true).await;
|
|
self.ad5940.sequencer_wait(16*10).await; // 10 us based on SYSCLK = 16MHz
|
|
self.ad5940.afecon(AFECON::ADCCONVEN | AFECON::DFTEN, true).await;
|
|
self.ad5940.sequencer_wait(wait_time).await; // Determined above
|
|
self.ad5940.sequencer_wait(16*20).await; // 20 us based on SYSCLK = 16MHz
|
|
self.ad5940.afecon(AFECON::WAVEGENEN | AFECON:: ADCEN | AFECON::ADCCONVEN | AFECON::DFTEN, false).await;
|
|
}
|
|
|
|
// Toggle leds
|
|
self.ad5940.write_reg(Register::SYNCEXTDEVICE, 0b010).await.unwrap();
|
|
self.ad5940.sequencer_wait(16 * 1_000).await; // 1ms based on SYSCLK = 16MHz
|
|
self.ad5940.write_reg(Register::SYNCEXTDEVICE, 0b111).await.unwrap();
|
|
|
|
self.ad5940.sequencer_enable(false).await;
|
|
|
|
// Write sequence to SRAM
|
|
let start_address = 0;
|
|
self.ad5940.sequencer_cmd_write(start_address).await;
|
|
|
|
self.ad5940.sequencer_info_configure(0, self.ad5940.seq_len, start_address).await;
|
|
|
|
self.start_measurement().await;
|
|
|
|
Ok(periods_per_dft_vec)
|
|
}
|
|
|
|
pub async fn init_sweep_frequency_measurement_4_lead<const N: usize>(&mut self, number_of_points: MeasurementPointSet) -> Result<heapless::Vec<f32, N>, ImpedanceInitError> {
|
|
// Configure LP DAC and TIA
|
|
self.common_mode_output_enable(true).await.unwrap();
|
|
|
|
// Create vector to store the periods per DFT for each frequency
|
|
let mut periods_per_dft_vec = heapless::Vec::<f32, N>::new();
|
|
|
|
// Calibrate Rtia
|
|
match number_of_points {
|
|
MeasurementPointSet::Eight => {
|
|
let results = self.calibrate_rtia_multiple::<8>(number_of_points).await.unwrap();
|
|
self.rtia_calibrated = RtiaCalibrated::Vec8(results);
|
|
},
|
|
MeasurementPointSet::Eighteen => {
|
|
let results = self.calibrate_rtia_multiple::<18>(number_of_points).await.unwrap();
|
|
self.rtia_calibrated = RtiaCalibrated::Vec18(results);
|
|
},
|
|
}
|
|
|
|
// Reset FIFO
|
|
self.ad5940.clear_and_enable_fifo().await.unwrap();
|
|
|
|
// Configure GPIOs
|
|
self.ad5940.write_reg(Register::GP0CON, 0b10 << 4 | 0b10 << 2 | 0b10).await.unwrap();
|
|
self.ad5940.write_reg(Register::SYNCEXTDEVICE, 0b111).await.unwrap();
|
|
|
|
// Configure sequencer
|
|
self.ad5940.sequencer_enable(true).await;
|
|
|
|
// Set DFT number based on the frequency
|
|
for &frequency in number_of_points.values() {
|
|
// Determine wait time
|
|
let selected_dft_num = match frequency {
|
|
f if f < 10 => DFTNUM::Num16384,
|
|
f if f < 100 => DFTNUM::Num16384,
|
|
f if f < 250 => DFTNUM::Num8192,
|
|
f if f < 1000 => DFTNUM::Num4096,
|
|
f if f < 2500 => DFTNUM::Num2048,
|
|
f if f < 10000 => DFTNUM::Num1024,
|
|
f if f < 25000 => DFTNUM::Num512,
|
|
f if f < 100000 => DFTNUM::Num256,
|
|
_ => DFTNUM::Num128,
|
|
};
|
|
|
|
let wait_time: u32;
|
|
|
|
if let Some(dsp_config) = &mut self.dsp_config {
|
|
dsp_config
|
|
.dftnum(selected_dft_num);
|
|
|
|
// Update DFTNUM
|
|
let mut current = self.ad5940.read_reg(Register::DFTCON).await.unwrap();
|
|
current = DFTNUM::apply(current, selected_dft_num as u32);
|
|
self.ad5940.write_reg(Register::DFTCON, current).await.unwrap();
|
|
|
|
wait_time = self.ad5940.sequencer_calculate_wait_time(&dsp_config).await.unwrap();
|
|
let periods_per_dft = wait_time as f32 / dsp_config.fsys.unwrap() as f32 * frequency as f32;
|
|
|
|
periods_per_dft_vec.push(periods_per_dft).unwrap();
|
|
// info!("{}Hz: Sinus periods per DFT: {}", frequency, periods_per_dft);
|
|
} else {
|
|
error!("DSP configuration not set, cannot calculate wait time");
|
|
return Err(ImpedanceInitError::DSPNotSet);
|
|
}
|
|
|
|
// Configure switches
|
|
let switch_config = SwitchConfig::default()
|
|
.t9con(T9CON::T9Closed)
|
|
.tmuxcon(TMUXCON::T2Closed)
|
|
.nmuxcon(NMUXCON::N2Closed)
|
|
.pmuxcon(PMUXCON::P11Closed)
|
|
.dmuxcon(DMUXCON::D5Closed);
|
|
self.ad5940.apply_switch_config(switch_config).await.unwrap();
|
|
|
|
// Set frequency
|
|
self.ad5940.wgfcw(frequency as u32).await;
|
|
let wg_amplitude = 2047; // 2047 is the maximum amplitude for a 12-bit DAC --> 1.62V peak-to-peak
|
|
self.ad5940.write_reg(Register::WGAMPLITUDE, wg_amplitude).await.unwrap();
|
|
|
|
// Voltage measurement
|
|
self.dsp_config.as_mut().unwrap()
|
|
.adc_mux_n(MUXSELN::AIN3)
|
|
.adc_mux_p(MUXSELP::AIN2);
|
|
// self.dsp_config.as_mut().unwrap()
|
|
// .adc_mux_n(MUXSELN::AIN1)
|
|
// .adc_mux_p(MUXSELP::CE0);
|
|
self.ad5940.apply_dsp_config(self.dsp_config.as_ref().unwrap()).await.unwrap();
|
|
|
|
self.ad5940.afecon(AFECON::WAVEGENEN | AFECON::ADCEN, true).await;
|
|
self.ad5940.sequencer_wait(16*10).await; // 10 us based on SYSCLK = 16MHz
|
|
self.ad5940.afecon(AFECON::ADCCONVEN | AFECON::DFTEN, true).await;
|
|
self.ad5940.sequencer_wait(wait_time).await; // Determined above
|
|
self.ad5940.sequencer_wait(16*20).await; // 20 us based on SYSCLK = 16MHz
|
|
self.ad5940.afecon(AFECON::WAVEGENEN | AFECON:: ADCEN | AFECON::ADCCONVEN | AFECON::DFTEN, false).await;
|
|
|
|
// Current measurement
|
|
self.dsp_config.as_mut().unwrap()
|
|
.adc_mux_n(MUXSELN::HsTiaNeg)
|
|
.adc_mux_p(MUXSELP::HsTiaPos);
|
|
self.ad5940.apply_dsp_config(self.dsp_config.as_ref().unwrap()).await.unwrap();
|
|
|
|
self.ad5940.afecon(AFECON::WAVEGENEN | AFECON::ADCEN, true).await;
|
|
self.ad5940.sequencer_wait(16*10).await; // 10 us based on SYSCLK = 16MHz
|
|
self.ad5940.afecon(AFECON::ADCCONVEN | AFECON::DFTEN, true).await;
|
|
self.ad5940.sequencer_wait(wait_time).await; // Determined above
|
|
self.ad5940.sequencer_wait(16*20).await; // 20 us based on SYSCLK = 16MHz
|
|
self.ad5940.afecon(AFECON::WAVEGENEN | AFECON:: ADCEN | AFECON::ADCCONVEN | AFECON::DFTEN, false).await;
|
|
}
|
|
|
|
// Toggle leds
|
|
self.ad5940.write_reg(Register::SYNCEXTDEVICE, 0b010).await.unwrap();
|
|
self.ad5940.sequencer_wait(16 * 1_000).await; // 1ms based on SYSCLK = 16MHz
|
|
self.ad5940.write_reg(Register::SYNCEXTDEVICE, 0b111).await.unwrap();
|
|
|
|
self.ad5940.sequencer_enable(false).await;
|
|
|
|
// Write sequence to SRAM
|
|
let start_address = 0;
|
|
self.ad5940.sequencer_cmd_write(start_address).await;
|
|
|
|
self.ad5940.sequencer_info_configure(0, self.ad5940.seq_len, start_address).await;
|
|
|
|
self.start_measurement().await;
|
|
|
|
Ok(periods_per_dft_vec)
|
|
}
|
|
|
|
pub async fn start_measurement(&mut self) {
|
|
self.ad5940.sequencer_trigger(0).await;
|
|
}
|
|
|
|
pub async fn get_fifo_count(&mut self) -> Result<u32, Error> {
|
|
self.ad5940.get_fifo_count().await
|
|
}
|
|
|
|
pub async fn read_fifo(&mut self, data: &mut [u32]) -> Result<(), Error> {
|
|
self.ad5940.read_fifo(data).await
|
|
}
|
|
}
|
|
|
|
// Task to wait for the interrupt from the AD5940 and read the FIFO
|
|
// Depending on the running mode, it will read either a single frequency or multiple frequencies
|
|
// Result is sent via channel to the communication task which then sends it via USB to the host
|
|
#[embassy_executor::task]
|
|
pub async fn impedance_setup_readout_task(mut pin: ExtiInput<'static>, impedance_setup: &'static ImpedanceSetupType) {
|
|
loop {
|
|
// Wait untill sequence is done
|
|
pin.wait_for_rising_edge().await;
|
|
|
|
// Lock the impedance setup
|
|
let mut impedance_setup = impedance_setup.lock().await;
|
|
|
|
// Trigger the sequencer again
|
|
if impedance_setup.running_mode == RunningMode::SingleFrequency2Lead || impedance_setup.running_mode == RunningMode::SingleFrequency4Lead || impedance_setup.running_mode == RunningMode::SweepFrequency2Lead(MeasurementPointSet::Eight) || impedance_setup.running_mode == RunningMode::SweepFrequency2Lead(MeasurementPointSet::Eighteen) || impedance_setup.running_mode == RunningMode::SweepFrequency4Lead(MeasurementPointSet::Eight) || impedance_setup.running_mode == RunningMode::SweepFrequency4Lead(MeasurementPointSet::Eighteen) {
|
|
impedance_setup.start_measurement().await;
|
|
}
|
|
|
|
// Read the FIFO count
|
|
let count = impedance_setup.get_fifo_count().await.unwrap() as usize;
|
|
// info!("FIFOCNTSTA: {}", count);
|
|
|
|
match impedance_setup.running_mode {
|
|
RunningMode::None => {
|
|
continue; // Skip processing if not running
|
|
}
|
|
RunningMode::SingleFrequency2Lead => {
|
|
if count >= 4 {
|
|
let mut data: [u32; 4] = [0; 4];
|
|
|
|
impedance_setup.read_fifo(data.as_mut_slice()).await.unwrap();
|
|
|
|
let result = calculate_impedance_2_lead(data);
|
|
|
|
// Log
|
|
// info!("Impedance: Magnitude = {} Ω, Phase = {} rad", result.magnitude, result.phase);
|
|
|
|
let data = SingleImpedanceOutput {
|
|
magnitude: result.magnitude,
|
|
phase: result.phase,
|
|
};
|
|
|
|
IMPEDANCE_CHANNEL_SINGLE.try_send(data).ok();
|
|
}
|
|
}
|
|
RunningMode::SingleFrequency4Lead => {
|
|
if count >= 4 {
|
|
let mut data: [u32; 4] = [0; 4];
|
|
|
|
impedance_setup.read_fifo(data.as_mut_slice()).await.unwrap();
|
|
match impedance_setup.rtia_calibrated {
|
|
RtiaCalibrated::Single(ref cal) => {
|
|
let result = calculate_impedance_4_lead(data, cal);
|
|
|
|
let data = SingleImpedanceOutput {
|
|
magnitude: result.magnitude,
|
|
phase: result.phase
|
|
};
|
|
|
|
IMPEDANCE_CHANNEL_SINGLE.try_send(data).ok();
|
|
}
|
|
_ => {
|
|
error!("Rtia not (correctly) calibrated, cannot compute impedance");
|
|
continue;
|
|
},
|
|
}
|
|
}
|
|
}
|
|
RunningMode::SweepFrequency2Lead(points) => {
|
|
// Each frequency point produces 4 samples (DFT real/imag for Rcal and Rz)
|
|
let required_count = points.len() * 4;
|
|
|
|
if count >= required_count {
|
|
// Use stack-allocated array
|
|
let mut data: [u32; 72] = [0; 72]; // max needed size (18*4=72)
|
|
let data_slice = &mut data[..required_count];
|
|
impedance_setup.read_fifo(data_slice).await.unwrap();
|
|
|
|
// Output structure
|
|
let mut impedance_output = SweepImpedanceOutput {
|
|
points,
|
|
magnitudes_8: Vec::new(),
|
|
phases_8: Vec::new(),
|
|
magnitudes_18: Vec::new(),
|
|
phases_18: Vec::new(),
|
|
};
|
|
|
|
// Take 4 samples per frequency point
|
|
for chunk in data_slice.chunks(4) {
|
|
let result = calculate_impedance_2_lead(chunk.try_into().unwrap());
|
|
|
|
match points {
|
|
MeasurementPointSet::Eight => {
|
|
impedance_output.magnitudes_8.push(result.magnitude).ok();
|
|
impedance_output.phases_8.push(result.phase).ok();
|
|
}
|
|
MeasurementPointSet::Eighteen => {
|
|
impedance_output.magnitudes_18.push(result.magnitude).ok();
|
|
impedance_output.phases_18.push(result.phase).ok();
|
|
}
|
|
}
|
|
}
|
|
|
|
IMPEDANCE_CHANNEL_SWEEP.try_send(impedance_output).ok();
|
|
}
|
|
continue;
|
|
}
|
|
RunningMode::SweepFrequency4Lead(points) => {
|
|
// Each frequency point produces 4 samples (DFT real/imag for Rcal and Rz)
|
|
let required_count = points.len() * 4;
|
|
|
|
if count >= required_count {
|
|
// Use stack-allocated array
|
|
let mut data: [u32; 72] = [0; 72]; // max needed size (18*4=72)
|
|
let data_slice = &mut data[..required_count];
|
|
impedance_setup.read_fifo(data_slice).await.unwrap();
|
|
|
|
// Output structure
|
|
let mut impedance_output = SweepImpedanceOutput {
|
|
points,
|
|
magnitudes_8: Vec::new(),
|
|
phases_8: Vec::new(),
|
|
magnitudes_18: Vec::new(),
|
|
phases_18: Vec::new(),
|
|
};
|
|
|
|
match (&points, &impedance_setup.rtia_calibrated) {
|
|
(MeasurementPointSet::Eight, RtiaCalibrated::Vec8(cal_vec)) => {
|
|
// Take 4 samples per frequency point
|
|
for (i, chunk) in data_slice.chunks(4).enumerate() {
|
|
let cal = &cal_vec[i];
|
|
let result = calculate_impedance_4_lead(chunk.try_into().unwrap(), cal);
|
|
|
|
impedance_output.magnitudes_8.push(result.magnitude).ok();
|
|
impedance_output.phases_8.push(result.phase).ok();
|
|
}
|
|
},
|
|
(MeasurementPointSet::Eighteen, RtiaCalibrated::Vec18(cal_vec)) => {
|
|
// Take 4 samples per frequency point
|
|
for (i, chunk) in data_slice.chunks(4).enumerate() {
|
|
let cal = &cal_vec[i];
|
|
let result = calculate_impedance_4_lead(chunk.try_into().unwrap(), cal);
|
|
|
|
impedance_output.magnitudes_18.push(result.magnitude).ok();
|
|
impedance_output.phases_18.push(result.phase).ok();
|
|
}
|
|
},
|
|
_ => {
|
|
error!("Rtia not (correctly) calibrated, cannot compute impedance");
|
|
continue;
|
|
}
|
|
}
|
|
|
|
IMPEDANCE_CHANNEL_SWEEP.try_send(impedance_output).ok();
|
|
}
|
|
continue;
|
|
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
#[derive(Debug)]
|
|
pub struct ImpedanceResult {
|
|
pub magnitude: f32,
|
|
pub phase: f32,
|
|
}
|
|
|
|
/// Convert raw 18-bit 2's complement value to signed i32
|
|
fn sign_extend_18bit(val: u32) -> i32 {
|
|
((val << 14) as i32) >> 14
|
|
}
|
|
|
|
/// Calculate magnitude and phase of Rz using Rcal reference
|
|
pub fn calculate_impedance_2_lead(data: [u32; 4]) -> ImpedanceResult {
|
|
let mut dft_rcal = Complex::new(
|
|
sign_extend_18bit(data[0]) as f32,
|
|
sign_extend_18bit(data[1]) as f32
|
|
);
|
|
let mut dft_rz = Complex::new(
|
|
sign_extend_18bit(data[2]) as f32,
|
|
sign_extend_18bit(data[3]) as f32
|
|
);
|
|
|
|
// Current is measured inverted in rtia
|
|
// --> Will cancel out in the impedance calculation
|
|
// dft_rcal.re *= -1.0;
|
|
// dft_rcal.im *= -1.0;
|
|
|
|
// dft_rz.re *= -1.0;
|
|
// dft_rz.im *= -1.0;
|
|
|
|
// Impedance imaginary part is measured inverted
|
|
dft_rcal.im *= -1.0;
|
|
dft_rz.im *= -1.0;
|
|
|
|
let (rcal_mag, rcal_phase) = dft_rcal.to_polar();
|
|
let (rz_mag, rz_phase) = dft_rz.to_polar();
|
|
|
|
let magnitude = (rcal_mag / rz_mag) * RCAL;
|
|
let phase = rcal_phase - rz_phase;
|
|
|
|
ImpedanceResult { magnitude, phase }
|
|
}
|
|
|
|
/// Calculate magnitude and phase of Rz using the calibrated Rtia
|
|
pub fn calculate_impedance_4_lead(data: [u32; 4], rtia: &RtiaCalibrationResult) -> ImpedanceResult {
|
|
let mut dft_volt = Complex::new(
|
|
sign_extend_18bit(data[0]) as f32,
|
|
sign_extend_18bit(data[1]) as f32
|
|
);
|
|
let mut dft_curr = Complex::new(
|
|
sign_extend_18bit(data[2]) as f32,
|
|
sign_extend_18bit(data[3]) as f32
|
|
);
|
|
|
|
// Current is measured inverted in rtia
|
|
dft_curr.re *= -1.0;
|
|
dft_curr.im *= -1.0;
|
|
|
|
// Impedance imaginary part is measured inverted
|
|
dft_volt.im *= -1.0;
|
|
dft_curr.im *= -1.0;
|
|
|
|
let (volt_mag, volt_phase) = dft_volt.to_polar();
|
|
let (curr_mag, curr_phase) = dft_curr.to_polar();
|
|
|
|
// Calculate impedance using calibrated Rtia
|
|
let magnitude = volt_mag / curr_mag * rtia.magnitude;
|
|
let phase = volt_phase - curr_phase + rtia.phase;
|
|
|
|
let data = ImpedanceResult {
|
|
magnitude,
|
|
phase
|
|
};
|
|
|
|
data
|
|
}
|