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restructure

#1

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• 04959ce9cb Prevent phase wrap. restructure Hubald Verzijl 2025-11-06 14:09:11 +01:00
• 11dbf2a8d8 Fix starting bug showing cal value. Hubald Verzijl 2025-11-06 13:10:59 +01:00
• f6a88b6d66 Change multi to sweep. Hubald Verzijl 2025-11-06 12:13:52 +01:00
• 3716d7367e Implemented LP DAC for enabling common-mode during 4-lead measurement. Hubald Verzijl 2025-11-06 11:33:49 +01:00
• 324189ba72 Added 4-lead multi calibration. Hubald Verzijl 2025-11-03 19:16:42 +01:00
• 6358882a4c Added 4 lead-option for single frequency measurement. Hubald Verzijl 2025-11-03 17:19:10 +01:00
• 0859de24fb Added num_complex instead of custom complex struct. Hubald Verzijl 2025-10-31 10:23:25 +01:00
• 80957ce316 Add 2/4-lead option to GUI. Hubald Verzijl 2025-10-18 17:52:52 +02:00
• a17b25dba0 Add small delay to stabilize power. Hubald Verzijl 2025-10-17 12:12:46 +02:00
• 4e2f389d21 Moved readout to impedance.rs, changed frequency type to u32. Hubald Verzijl 2025-10-15 18:16:26 +02:00
• 3df0f4b098 Merge pull request #1 from hubaldv/multi main Hubald 2025-10-08 15:45:55 +02:00
• a9bb854a2e Included bode plot measurements, including different number of points. Hubald Verzijl 2025-10-08 15:40:17 +02:00
• ef0cecced7 Add FIFO reset function and return periods per DFT to GUI. Hubald Verzijl 2025-10-07 13:00:43 +02:00
• 50e1894edf Added multi frequency measurement mode. Hubald Verzijl 2025-10-07 10:19:26 +02:00
• d150c70700 Use signals instead of mutex. Hubald Verzijl 2025-09-16 16:19:33 +02:00
• 230602f7c8 Included setting dft number from gui. Hubald Verzijl 2025-09-12 22:42:23 +02:00
• b53e58ec31 Added clk config part, increased ADC clk to 32MHz. Hubald Verzijl 2025-09-09 13:04:15 +02:00
• 83731f77e0 Minor improvements Hubald Verzijl 2025-08-28 11:33:33 +02:00
• 044cfb069a Included running flag in struct. Hubald Verzijl 2025-08-18 17:28:16 +02:00
• d17ef6c7ae Updated library. Hubald Verzijl 2025-08-18 14:49:58 +02:00
• eaeff4f527 Created new impedance file for impedance_setup. Hubald Verzijl 2025-08-17 19:04:08 +02:00
• 3db4131784 Increased data output. Hubald Verzijl 2025-08-15 22:50:20 +02:00
• b3843b529e Implemented fifo readout. Hubald Verzijl 2025-08-15 22:23:27 +02:00
• 8d96817029 Started writing nice library. Hubald Verzijl 2025-08-15 10:01:50 +02:00
• bf3f00cfb0 Basic working impedance. Hubald Verzijl 2025-08-14 17:31:46 +02:00
• 03a04bf789 Added lineairmap to lib for sequencer. Hubald Verzijl 2025-08-14 13:23:23 +02:00
• f1015ee00d Added external interrupt and test to determine impedance. Not working yet. Hubald Verzijl 2025-08-12 22:44:08 +02:00
• 04b6083460 Working sequencer. Hubald Verzijl 2025-08-12 20:53:24 +02:00
• 6b15a77cb5 Created basic sinus output via postcard rpc. Hubald Verzijl 2025-08-06 18:26:28 +02:00
• 3f9f3fedf5 Included impedance topic. Hubald Verzijl 2025-08-06 15:44:49 +02:00
• fc27bdc089 Included LED RPC. Hubald Verzijl 2025-08-06 12:47:45 +02:00
• 47f99db183 Included unique ID. Hubald Verzijl 2025-08-06 11:21:31 +02:00
• 142576b033 Working communication, icd not as submodule. Hubald Verzijl 2025-08-04 19:48:42 +02:00
• 4cd3beba73 Implemented postcard-rpc. Hubald Verzijl 2025-08-04 16:58:34 +02:00
• 18220e4be9 Use external crystal, increase freq to 250MHz. Hubald Verzijl 2025-08-04 14:33:18 +02:00
• 0256b5d3f4 Updated AD5940 lib, now wait for custom PCB. Hubald Verzijl 2025-08-04 13:06:53 +02:00
• d04f457c9f Update register names Hubald Verzijl 2025-07-30 12:04:46 +02:00
• f0e9fbc52c Implemented registers in lib. Hubald Verzijl 2025-07-28 17:17:37 +02:00
• e6c3d6d06f Working waveform (sinus) generator. Hubald Verzijl 2025-07-23 14:56:41 +02:00
• 0c18664e48 Included lib for adg2128. Hubald Verzijl 2025-07-21 17:33:48 +02:00
• ed49071ffa Working temperature readout. Hubald Verzijl 2025-07-16 14:57:34 +02:00
• c6b250a4a8 Created basic lib for AD5940. Hubald Verzijl 2025-07-16 09:55:10 +02:00
• 73b96c2756 Fixed VS code Rust Analyzer. Hubald Verzijl 2025-07-16 09:54:55 +02:00
• 0db1d3e278 Initial commit, basic blinky working. Hubald Verzijl 2025-07-06 16:26:11 +02:00