mirror of
https://github.com/hubaldv/bioz-firmware-rs.git
synced 2025-12-06 05:01:18 +00:00
Added external interrupt and test to determine impedance. Not working yet.
This commit is contained in:
1
Cargo.lock
generated
1
Cargo.lock
generated
@@ -409,7 +409,6 @@ dependencies = [
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"defmt 0.3.100",
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"document-features",
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"embassy-embedded-hal 0.3.1",
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"embassy-executor",
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"embassy-futures",
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"embassy-hal-internal 0.2.0",
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"embassy-net-driver",
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@@ -5,7 +5,7 @@ edition = "2021"
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[dependencies]
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# Change stm32h563zi to your chip name, if necessary.
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embassy-stm32 = { version = "0.2.0", features = ["defmt", "stm32h533re", "memory-x", "time-driver-any", "exti", "unstable-pac", "low-power"] }
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embassy-stm32 = { version = "0.2.0", features = ["defmt", "stm32h533re", "memory-x", "time-driver-any", "exti", "unstable-pac"] }
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embassy-sync = { version = "0.6.0", features = ["defmt"] }
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embassy-executor = { version = "0.7.0", features = ["arch-cortex-m", "executor-thread", "defmt"] }
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embassy-time = { version = "0.4.0", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
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@@ -207,8 +207,8 @@ impl AD5940 {
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// info!("DATAFIFORD: 0x{:08X}", test);
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// }
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let test = self.read_reg_raw(0x2200).await.unwrap();
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info!("FIFOCNTSTA: {}", (test>>16) & 0b111_1111_1111);
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// let test = self.read_reg_raw(0x2200).await.unwrap();
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// info!("FIFOCNTSTA: {}", (test>>16) & 0b111_1111_1111);
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}
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pub async fn afecon(&mut self, ctr: AFECON, state: bool) {
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@@ -249,6 +249,22 @@ impl AD5940 {
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let reg = self.read_reg(Register::SWCON).await.unwrap();
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let mut reg = SWCON::from_bits_truncate(reg);
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// T9CON
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if ctr.contains(SWCON::T9CON) {
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reg |= SWCON::T9CON;
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} else {
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reg &= !SWCON::T9CON;
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}
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// TMUXCON
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if (ctr & SWCON::TMUXCON_MSK) == SWCON::TMUXCON_T2 {
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reg &= !SWCON::TMUXCON_MSK;
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reg |= SWCON::TMUXCON_T2;
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} else if (ctr & SWCON::TMUXCON_MSK) == SWCON::TMUXCON_TR1 {
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reg &= !SWCON::TMUXCON_MSK;
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reg |= SWCON::TMUXCON_TR1;
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}
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// NMUXCON
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if (ctr & SWCON::NMUXCON_MSK) == SWCON::NMUXCON_N2 {
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reg &= !SWCON::NMUXCON_MSK;
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@@ -256,7 +272,10 @@ impl AD5940 {
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} else if (ctr & SWCON::NMUXCON_MSK) == SWCON::NMUXCON_N5 {
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reg &= !SWCON::NMUXCON_MSK;
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reg |= SWCON::NMUXCON_N5;
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};
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} else if (ctr & SWCON::NMUXCON_MSK) == SWCON::NMUXCON_NR1 {
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reg &= !SWCON::NMUXCON_MSK;
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reg |= SWCON::NMUXCON_NR1;
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}
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// PMUXCON
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if (ctr & SWCON::PMUXCON_MSK) == SWCON::PMUXCON_P2 {
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@@ -265,12 +284,18 @@ impl AD5940 {
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} else if (ctr & SWCON::PMUXCON_MSK) == SWCON::PMUXCON_P11 {
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reg &= !SWCON::PMUXCON_MSK;
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reg |= SWCON::PMUXCON_P11;
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} else if (ctr & SWCON::PMUXCON_MSK) == SWCON::PMUXCON_PR0 {
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reg &= !SWCON::PMUXCON_MSK;
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reg |= SWCON::PMUXCON_PR0;
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}
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// DMUXCON
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if ctr.contains(SWCON::DMUXCON_D5) {
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if (ctr & SWCON::DMUXCON_MSK) == SWCON::DMUXCON_D5 {
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reg &= !SWCON::DMUXCON_MSK;
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reg |= SWCON::DMUXCON_D5;
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} else if { ctr & SWCON::DMUXCON_MSK } == SWCON::DMUXCON_DR0 {
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reg &= !SWCON::DMUXCON_MSK;
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reg |= SWCON::DMUXCON_DR0;
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}
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self.write_reg(Register::SWCON, reg.bits()).await.unwrap();
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@@ -397,7 +422,7 @@ impl AD5940 {
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| SWCON::PMUXCON_P11
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| SWCON::DMUXCON_D5).await;
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//
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self.write_reg_raw(0x0000_20D0, 0b1000 << 4).await.unwrap();
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self.write_reg_raw(0x0000_20D0, 0b1000 << 4).await.unwrap(); // 1024 OSR
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// SINC3 = 5 --> 160000 Hz
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// SINC2 = 178 --> 898,8764044944Hz
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// ... (DFTNUM = 2048)
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@@ -452,4 +477,7 @@ pub enum Register {
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SEQTIMEOUT = 0x0000_2068, // Sequencer Timeout Counter Register
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SEQCRC = 0x0000_2060, // Sequencer CRC Value Register
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DATAFIFOTHRES = 0x0000_21E0, // Data FIFO Threshold Register
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SYNCEXTDEVICE = 0x0000_2054, // Sync External Device Register
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GP0CON = 0x0000_0000, // GPIO Port 0 Configuration Register
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DATAFIFORD = 0x0000_206C, // Data FIFO Read Register
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}
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@@ -28,13 +28,20 @@ bitflags! {
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#[derive(Clone, Copy)]
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#[derive(PartialEq)]
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pub struct SWCON: u32 {
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const T9CON = 1 << 17; // T9 switch // RTIA switch
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const TMUXCON_MSK = 0b1111 << 12;
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const TMUXCON_T2 = 0b0010 << 12; // T2 switch
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const TMUXCON_TR1 = 0b1000 << 12; // TR1 switch
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const NMUXCON_MSK = 0b1111 << 8;
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const NMUXCON_N2 = 0b0010 << 8; // N2 switch
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const NMUXCON_N5 = 0b0101 << 8; // N5 switch
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const NMUXCON_NR1 = 0b1010 << 8; // NR1 switch
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const PMUXCON_MSK = 0b1111 << 4;
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const PMUXCON_PR0 = 0b0001 << 4; // PR0 switch
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const PMUXCON_P2 = 0b0010 << 4; // P2 switch
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const PMUXCON_P11 = 0b1011 << 4; // P11 switch
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const DMUXCON_MSK = 0b1111;
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const DMUXCON_DR0 = 0b0001; // DR0 switch
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const DMUXCON_D5 = 0b0101; // D5 switch
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}
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}
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133
src/main.rs
133
src/main.rs
@@ -3,13 +3,14 @@
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use defmt::info;
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use embassy_executor::Spawner;
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use embassy_stm32::exti::ExtiInput;
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use embassy_time::{Timer, Duration};
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use embassy_futures::{select::select, select::Either};
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use embassy_stm32::gpio::{Level, Output, Speed};
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use embassy_stm32::{i2c, spi, Config};
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use embassy_stm32::time::Hertz;
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use crate::ad5940_registers::{AFECON, AFEGENINTSTA};
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use crate::ad5940_registers::{AFECON, SWCON};
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use {defmt_rtt as _, panic_probe as _};
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@@ -69,6 +70,10 @@ async fn main(spawner: Spawner) {
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let cs = Output::new(p.PC9, Level::High, Speed::Low);
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let rst = Output::new(p.PB3, Level::High, Speed::Low);
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// Set up interrupt at GPIO for AD5940
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let ad5940_gpio_0 = ExtiInput::new(p.PC8, p.EXTI8, embassy_stm32::gpio::Pull::Up);
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spawner.must_spawn(ad5940_readout_task(ad5940_gpio_0));
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let spi = spi::Spi::new_blocking(
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p.SPI1,
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p.PA5, // SCK
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@@ -103,18 +108,37 @@ async fn main(spawner: Spawner) {
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// // electrodes.set(Electrode::E12, AD5940Pin::RE0, State::ENABLED);
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// Turn on the green LED
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ad5940.write_reg_raw(0x0000_0004, 1 << 1).await.unwrap();
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ad5940.write_reg_raw(0x0000_001C, 1 << 1).await.unwrap();
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// ad5940.write_reg_raw(0x0000_0004, 1 << 1).await.unwrap();
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// ad5940.write_reg_raw(0x0000_001C, 1 << 1).await.unwrap();
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// // Sequencer test
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ad5940.write_reg(ad5940::Register::GP0CON, 0b10 << 4 | 0b10 << 2 | 0b10).await.unwrap();
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ad5940.write_reg(ad5940::Register::SYNCEXTDEVICE, 0b111).await.unwrap();
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// Sequencer test
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ad5940.sequencer_enable(true).await;
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ad5940.afecon(AFECON::WAVEGENEN, true).await;
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ad5940.wgfcw(1000).await;
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ad5940.sequencer_wait(300_000).await;
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ad5940.wgfcw(2000).await;
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ad5940.sequencer_wait(160_000).await;
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// ad5940.sequencer_trigger_interrupt(AFEGENINTSTA::CUSTOMINT0).await;
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ad5940.afecon(AFECON::WAVEGENEN, false).await;
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ad5940.wgfcw(100).await;
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// Rcal
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ad5940.swcon(SWCON::DMUXCON_DR0 | SWCON::PMUXCON_PR0 | SWCON::NMUXCON_NR1 | SWCON::TMUXCON_TR1 | SWCON::T9CON).await; // RCAL0 -->
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ad5940.afecon(AFECON::WAVEGENEN | AFECON::ADCEN, true).await;
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ad5940.sequencer_wait(16*10).await; // 10 us
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ad5940.afecon(AFECON::ADCCONVEN | AFECON::DFTEN, true).await;
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ad5940.sequencer_wait(16 * 1_500_000).await; // 1.5 second
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ad5940.afecon(AFECON::WAVEGENEN | AFECON:: ADCEN | AFECON::ADCCONVEN | AFECON::DFTEN, false).await;
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// Rz
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ad5940.swcon(SWCON::DMUXCON_D5 | SWCON::PMUXCON_P11 | SWCON::NMUXCON_N2 | SWCON::TMUXCON_MSK | SWCON::TMUXCON_T2).await;
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ad5940.afecon(AFECON::WAVEGENEN | AFECON::ADCEN, true).await;
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ad5940.sequencer_wait(16*10).await; // 10 us
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ad5940.afecon(AFECON::ADCCONVEN | AFECON::DFTEN, true).await;
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ad5940.sequencer_wait(16 * 1_500_000).await; // 1.5 second
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ad5940.afecon(AFECON::WAVEGENEN | AFECON:: ADCEN | AFECON::ADCCONVEN | AFECON::DFTEN, false).await;
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// Toggle leds
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ad5940.write_reg(ad5940::Register::SYNCEXTDEVICE, 0b010).await.unwrap();
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ad5940.sequencer_wait(16 * 100_000).await; // 0.1 second
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ad5940.write_reg(ad5940::Register::SYNCEXTDEVICE, 0b111).await.unwrap();
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ad5940.sequencer_enable(false).await;
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// // Configure the sequencer cmd data sram
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@@ -148,13 +172,26 @@ async fn main(spawner: Spawner) {
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ad5940.sequencer_trigger(0).await;
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// info!("Mainloop still running!");
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Timer::after_millis(250).await;
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Timer::after_millis(3500).await;
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// let test = ad5940.read_reg_raw(0x2200).await.unwrap();
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// info!("FIFOCNTSTA: {}", (test>>16) & 0b111_1111_1111);
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let mut data: [u32; 4] = [0; 4];
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data[0] = ad5940.read_reg(ad5940::Register::DATAFIFORD).await.unwrap();
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data[1] = ad5940.read_reg(ad5940::Register::DATAFIFORD).await.unwrap();
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data[2] = ad5940.read_reg(ad5940::Register::DATAFIFORD).await.unwrap();
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data[3] = ad5940.read_reg(ad5940::Register::DATAFIFORD).await.unwrap();
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let result = calculate_impedance(data);
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// You’ll need to implement your own logging or send this over serial in embedded
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info!("Impedance: Magnitude = {} Ω, Phase = {} rad", result.magnitude, result.phase);
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// let test = ad5940.read_reg_raw(0x2200).await.unwrap();
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// info!("FIFOCNTSTA: {}", (test>>16) & 0b111_1111_1111);
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}
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}
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@@ -180,3 +217,71 @@ async fn green_led(mut led: Output<'static>) {
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led.toggle();
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}
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}
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#[embassy_executor::task]
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async fn ad5940_readout_task(mut pin: ExtiInput<'static>) {
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loop {
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pin.wait_for_falling_edge().await;
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info!("AD5940 interrupt triggered!");
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}
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}
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extern crate libm;
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#[derive(Debug, Clone, Copy)]
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pub struct Complex {
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real: i32,
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imag: i32,
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}
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#[derive(Debug)]
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pub struct ImpedanceResult {
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pub magnitude: f32,
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pub phase: f32,
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}
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// Example Rcal value (Ohms)
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const RCAL_VAL: f32 = 1000.0;
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/// Convert raw 18-bit 2's complement value to signed i32
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fn sign_extend_18bit(val: u32) -> i32 {
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let masked = val & 0x3FFFF;
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if masked & (1 << 17) != 0 {
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(masked | 0xFFFC0000) as i32
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} else {
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masked as i32
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}
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}
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/// Calculate magnitude and phase of Rz using Rcal reference
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pub fn calculate_impedance(data: [u32; 4]) -> ImpedanceResult {
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let mut signed_data = [0i32; 4];
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for (i, &val) in data.iter().enumerate() {
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signed_data[i] = sign_extend_18bit(val);
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}
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let dft_rcal = Complex {
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real: signed_data[0],
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imag: signed_data[1],
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};
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let dft_rz = Complex {
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real: signed_data[2],
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imag: signed_data[3],
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};
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let rcal_mag = libm::sqrtf((dft_rcal.real as f32) * (dft_rcal.real as f32)
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+ (dft_rcal.imag as f32) * (dft_rcal.imag as f32));
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let rz_mag = libm::sqrtf((dft_rz.real as f32) * (dft_rz.real as f32)
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+ (dft_rz.imag as f32) * (dft_rz.imag as f32));
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let rcal_phase = libm::atan2f(-(dft_rcal.imag as f32), dft_rcal.real as f32);
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let rz_phase = libm::atan2f(-(dft_rz.imag as f32), dft_rz.real as f32);
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let magnitude = (rcal_mag / rz_mag) * RCAL_VAL;
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let phase = rcal_phase - rz_phase;
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ImpedanceResult { magnitude, phase }
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}
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