mirror of
https://github.com/hubaldv/bioz-firmware-rs.git
synced 2025-12-06 05:01:18 +00:00
Working temperature readout.
This commit is contained in:
141
src/ad5940.rs
141
src/ad5940.rs
@@ -1,4 +1,7 @@
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use embassy_stm32::{gpio::Output, mode::Blocking, spi::Spi};
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use embassy_stm32::{gpio::Output, mode::Blocking, spi::Spi, spi::Error};
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use embassy_time::Timer;
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use crate::ad5940_registers::*;
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pub struct AD5940 {
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spi: Spi<'static, Blocking>,
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@@ -10,15 +13,16 @@ impl AD5940 {
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AD5940 { spi, cs }
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}
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fn read_reg_16(&mut self, address: u16) -> Result<u16, embassy_stm32::spi::Error> {
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let addr_bytes = address.to_be_bytes();
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async fn read_reg_16(&mut self, address: Register) -> Result<u16, Error> {
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// Write address command
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self.cs.set_low();
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self.spi.blocking_write(&[Command::SPICMD_SETADDR as u8])?;
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self.spi.blocking_write(&addr_bytes)?;
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self.spi.blocking_write(&[address as u16])?;
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self.cs.set_high();
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// Wait after cs is high
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Timer::after_nanos(80).await;
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// Read command
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self.cs.set_low();
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self.spi.blocking_write(&[Command::SPICMD_READREG as u8])?;
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@@ -30,22 +34,139 @@ impl AD5940 {
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Ok(u16::from_be_bytes([data[1], data[2]]))
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}
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pub fn get_chipid(&mut self) -> Result<u16, embassy_stm32::spi::Error> {
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self.read_reg_16(Register::CHIPID as u16)
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async fn read_reg_32(&mut self, address: Register) -> Result<u32, Error> {
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// Write address command
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self.cs.set_low();
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self.spi.blocking_write(&[Command::SPICMD_SETADDR as u8])?;
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self.spi.blocking_write(&[address as u16])?;
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self.cs.set_high();
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// Wait after cs is high
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Timer::after_nanos(80).await;
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// Read command
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self.cs.set_low();
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self.spi.blocking_write(&[Command::SPICMD_READREG as u8])?;
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let mut data = [0u8; 5]; // First byte dummy, then four data bytes
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self.spi.blocking_read(&mut data)?;
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self.cs.set_high();
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Ok(u32::from_be_bytes([data[1], data[2], data[3], data[4]]))
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}
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async fn write_reg_32(&mut self, address: Register, value: u32) -> Result<(), Error> {
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self.write_reg_32_raw(address as u16, value).await
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}
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async fn write_reg_32_raw(&mut self, address: u16, value: u32) -> Result<(), Error> {
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// Write address command
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self.cs.set_low();
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self.spi.blocking_write(&[Command::SPICMD_SETADDR as u8])?;
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self.spi.blocking_write(&[address as u16])?;
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self.cs.set_high();
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// Wait after cs is high
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Timer::after_nanos(80).await;
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// Write value command
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self.cs.set_low();
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self.spi.blocking_write(&[Command::SPICMD_WRITEREG as u8])?;
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self.spi.blocking_write(&[value])?;
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self.cs.set_high();
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Ok(())
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}
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async fn write_reg_16_raw(&mut self, address: u16, value: u16) -> Result<(), Error> {
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// Write address command
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self.cs.set_low();
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self.spi.blocking_write(&[Command::SPICMD_SETADDR as u8])?;
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self.spi.blocking_write(&[address as u16])?;
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self.cs.set_high();
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// Wait after cs is high
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Timer::after_nanos(80).await;
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// Write value command
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self.cs.set_low();
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self.spi.blocking_write(&[Command::SPICMD_WRITEREG as u8])?;
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self.spi.blocking_write(&[value])?;
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self.cs.set_high();
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Ok(())
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}
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pub async fn system_init(&mut self) -> Result<(), Error> {
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// See table 14
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self.write_reg_16_raw(0x0908, 0x02C9).await?;
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self.write_reg_16_raw(0x0C08, 0x206C).await?;
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self.write_reg_16_raw(0x21F0, 0x0010).await?;
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self.write_reg_16_raw(0x0410, 0x02C9).await?;
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self.write_reg_16_raw(0x0A28, 0x0009).await?;
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self.write_reg_16_raw(0x238C, 0x0104).await?;
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self.write_reg_16_raw(0x0A04, 0x4859).await?;
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self.write_reg_16_raw(0x0A04, 0xF27B).await?;
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self.write_reg_16_raw(0x0A00, 0x8009).await?;
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self.write_reg_16_raw(0x22F0, 0x0000).await?;
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Ok(())
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}
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pub async fn get_chipid(&mut self) -> Result<u16, Error> {
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self.read_reg_16(Register::CHIPID).await
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}
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pub async fn get_adiid(&mut self) -> Result<u16, Error> {
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self.read_reg_16(Register::ADIID).await
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}
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pub async fn init_temperature(&mut self) -> Result<(), Error> {
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// AFECON:
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let mut config_afecon = ConfigurationRegister::reset.bits() | ConfigurationRegister::TEMPSENSEN.bits() | ConfigurationRegister::ADCEN.bits();
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self.write_reg_32(Register::AFECON, config_afecon).await?;
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// ADCCON
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let config_adccon = ADCConfigurationRegister::GNPGA_1_5.bits() | ADCConfigurationRegister::MUXSELN_TEMP.bits() | ADCConfigurationRegister::MUXSELP_TEMP.bits();
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self.write_reg_32(Register::ADCCON, config_adccon).await?;
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// AFECON - start conversion
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config_afecon |= ConfigurationRegister::TEMPCONVEN.bits();
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config_afecon |= ConfigurationRegister::ADCCONVEN.bits();
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self.write_reg_32(Register::AFECON, config_afecon).await?;
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Ok(())
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}
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pub async fn get_temperature(&mut self) -> Result<f32, Error> {
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// See page 57 of the datasheet for temperature calculation
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let pga_gain = 1.5;
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let k = 8.13;
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let mut tempsensdat0: u32 = self.read_reg_32(Register::TEMPSENSDAT).await?;
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tempsensdat0 &= 0x0000FFFF;
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Ok((tempsensdat0 as f32/(pga_gain * k)) - 273.15)
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}
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}
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#[allow(dead_code)]
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#[allow(non_camel_case_types)]
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enum Command {
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SPICMD_SETADDR = 0x20,
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SPICMD_READREG = 0x6D,
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SPICMD_SETADDR = 0x20,
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SPICMD_READREG = 0x6D,
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SPICMD_WRITEREG = 0x2D,
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SPICMD_READFIFO = 0x5F,
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}
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#[allow(dead_code)]
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#[allow(non_camel_case_types)]
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#[repr(u16)]
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enum Register {
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CHIPID = 0x0000_0404, // Changed from u32 to u16, as expected by SPI write
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ADIID = 0x0000_0400, // Analog Devices Inc., identification register
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CHIPID = 0x0000_0404, // Chip identification register
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AFECON = 0x0000_2000, // Configuration Register
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TEMPSENSDAT = 0x0000_2084, // Temperature Sensor Result Register
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ADCDAT = 0x0000_2074, // ADC Raw Result Register
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TEMPSENS = 0x0000_2174, // Temperature Sensor Configuration Register
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ADCCON = 0x0000_21A8, // ADC Configuration Register
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}
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