mirror of
https://github.com/hubaldv/bioz-firmware-rs.git
synced 2025-12-06 05:01:18 +00:00
Updated library.
This commit is contained in:
@@ -3,6 +3,9 @@ use defmt::{info, error};
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use embassy_stm32::spi::Error;
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use embassy_sync::blocking_mutex::raw::ThreadModeRawMutex;
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use embassy_sync::channel::Channel;
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use embassy_sync::mutex::Mutex;
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use static_cell::StaticCell;
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use crate::ad5940::*;
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use crate::ad5940_registers::*;
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@@ -11,13 +14,17 @@ use bioz_icd_rs::ImpedanceOutput;
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pub static IMPEDANCE_CHANNEL: Channel<ThreadModeRawMutex, ImpedanceOutput, 2000> = Channel::new();
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pub type ImpedanceSetupType = Mutex<ThreadModeRawMutex, ImpedanceSetup>;
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pub static IMPEDANCE_SETUP: StaticCell<ImpedanceSetupType> = StaticCell::new();
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pub struct ImpedanceSetup {
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ad5940: AD5940,
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dsp_config: Option<DspConfig>,
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}
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impl ImpedanceSetup {
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pub fn new(ad5940: AD5940) -> Self {
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ImpedanceSetup { ad5940 }
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ImpedanceSetup { ad5940, dsp_config: None }
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}
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pub async fn init(&mut self) -> Result<(), Error> {
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@@ -48,10 +55,16 @@ impl ImpedanceSetup {
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.hanning(true);
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self.ad5940.apply_dsp_config(&dsp_config).await.unwrap();
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self.dsp_config = Some(dsp_config);
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let test = self.ad5940.sequencer_calculate_wait_time(&dsp_config).await.unwrap();
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info!("Wait time: {:?}", test);
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// Set SRAM configuration (cmd and data sram)
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let sram_config = SramConfig::default()
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.datafifosrcsel(DATAFIFOSRCSEL::DFT)
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.datafifoen(DATAFIFOEN::Normal)
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.data_size(DATA_MEM_SEL::Size2kB)
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.cmd_mode(CMDMEMMDE::MemoryMode)
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.cmd_size(CMD_MEM_SEL::Size2kB);
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self.ad5940.apply_sram_config(sram_config).await.unwrap();
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// WGCON: set sinus output
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let config_wgcon = WGCON::TYPESEL_SIN.bits();
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@@ -60,15 +73,24 @@ impl ImpedanceSetup {
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Ok(())
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}
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pub async fn init_measurement(&mut self) {
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pub async fn init_single_frequency_measurement(&mut self, frequency: u32) {
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// Configure GPIOs
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self.ad5940.write_reg(Register::GP0CON, 0b10 << 4 | 0b10 << 2 | 0b10).await.unwrap();
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self.ad5940.write_reg(Register::SYNCEXTDEVICE, 0b111).await.unwrap();
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// Calculate wait time between measurement start and stop
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let mut wait_time = 0;
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if let Some(dsp_config) = &self.dsp_config {
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wait_time = self.ad5940.sequencer_calculate_wait_time(dsp_config).await.unwrap();
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info!("Sinus periods per DFT: {}", wait_time as f32 / 16e6 * frequency as f32);
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} else {
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error!("DSP configuration not set, cannot calculate wait time");
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}
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// Configure sequencer
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self.ad5940.sequencer_enable(true).await;
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self.ad5940.wgfcw(50000).await;
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self.ad5940.wgfcw(frequency).await;
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let wg_amplitude = 557; // 2047 is the maximum amplitude for a 12-bit DAC --> 1.62V peak-to-peak
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self.ad5940.write_reg(Register::WGAMPLITUDE, wg_amplitude).await.unwrap();
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@@ -83,9 +105,8 @@ impl ImpedanceSetup {
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self.ad5940.afecon(AFECON::WAVEGENEN | AFECON::ADCEN, true).await;
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self.ad5940.sequencer_wait(16*10).await; // 10 us
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self.ad5940.afecon(AFECON::ADCCONVEN | AFECON::DFTEN, true).await;
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// self.ad5940.sequencer_wait(16 * 102_400).await; // 0.75 second // 0,0512
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self.ad5940.sequencer_wait(16 * 12_800).await; // 0.75 second // 0,0512
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self.ad5940.sequencer_wait(16*20).await; // 0.75 second // 0,0512
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self.ad5940.sequencer_wait(wait_time).await; // Determined above
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self.ad5940.sequencer_wait(16*20).await; // 10 us
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self.ad5940.afecon(AFECON::WAVEGENEN | AFECON:: ADCEN | AFECON::ADCCONVEN | AFECON::DFTEN, false).await;
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// Rz
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@@ -99,9 +120,8 @@ impl ImpedanceSetup {
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self.ad5940.afecon(AFECON::WAVEGENEN | AFECON::ADCEN, true).await;
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self.ad5940.sequencer_wait(16*10).await; // 10 us
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self.ad5940.afecon(AFECON::ADCCONVEN | AFECON::DFTEN, true).await;
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// self.ad5940.sequencer_wait(16 * 102_400).await; // 0.75 second
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self.ad5940.sequencer_wait(16 * 12_800).await; // 0.75 second // 0,0512
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self.ad5940.sequencer_wait(16*20).await; // 0.75 second // 0,0512
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self.ad5940.sequencer_wait(wait_time).await; // Determined above
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self.ad5940.sequencer_wait(16*20).await; // 10 us
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self.ad5940.afecon(AFECON::WAVEGENEN | AFECON:: ADCEN | AFECON::ADCCONVEN | AFECON::DFTEN, false).await;
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// Toggle leds
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@@ -111,13 +131,13 @@ impl ImpedanceSetup {
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self.ad5940.sequencer_enable(false).await;
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// // Configure the sequencer cmd data sram
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self.ad5940.cmddatacon().await;
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// Write sequence to SRAM
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let start_address = 0;
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self.ad5940.sequencer_cmd_write(start_address).await;
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self.ad5940.sequencer_info_configure(0, self.ad5940.seq_len, start_address).await;
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self.start_measurement().await;
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}
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pub async fn start_measurement(&mut self) {
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