Added clk config part, increased ADC clk to 32MHz.

This commit is contained in:
2025-09-09 13:04:15 +02:00
parent 83731f77e0
commit b53e58ec31
3 changed files with 216 additions and 12 deletions

View File

@@ -42,18 +42,27 @@ impl ImpedanceSetup {
)
.await;
// Set CLK configuration
let clk_config = ClkConfig::default()
.adcclkdiv(ADCCLKDIV::DIV1) // ADCCLK = 32MHz
.sysclkdiv(SYSCLKDIV::DIV2) // SYSCLK = 16MHz
.clk32mhzen(CLK32MHZEN::MHz32);
self.ad5940.apply_clk_config(&clk_config).await.unwrap();
// Set DSP configuration
let dsp_config = DspConfig::default()
.adc_mux_n(MUXSELN::HsTiaNeg)
.adc_mux_p(MUXSELP::HsTiaPos)
.ctiacon(CTIACON::C32)
.rtiacon(RTIACON::R1k)
.sinc3osr(SINC3OSR::R5)
.sinc3osr(SINC3OSR::R4)
.sinc2osr(SINC2OSR::R178)
.adcsamplerate(ADCSAMPLERATE::R800kHz)
.adcsamplerate(ADCSAMPLERATE::R1_6MHz)
.dftin_sel(DFTINSEL::GainOffset)
.dftnum(DFTNUM::Num2048)
.hanning(true);
.dftnum(DFTNUM::Num4096)
.hanning(true)
.set_clks(16_000_000, 32_000_000); // Check clk_config: In this case SYSCLK = 16MHz and ADCCLK = 32MHz
self.ad5940.apply_dsp_config(&dsp_config).await.unwrap();
self.dsp_config = Some(dsp_config);
@@ -83,7 +92,7 @@ impl ImpedanceSetup {
let mut wait_time = 0;
if let Some(dsp_config) = &self.dsp_config {
wait_time = self.ad5940.sequencer_calculate_wait_time(dsp_config).await.unwrap();
info!("Sinus periods per DFT: {}", wait_time as f32 / 16e6 * frequency as f32);
info!("Sinus periods per DFT: {}", wait_time as f32 / dsp_config.fsys.unwrap() as f32 * frequency as f32);
} else {
error!("DSP configuration not set, cannot calculate wait time");
}
@@ -104,10 +113,10 @@ impl ImpedanceSetup {
.dmuxcon(DMUXCON::DR0Closed);
self.ad5940.apply_switch_config(switch_config).await.unwrap();
self.ad5940.afecon(AFECON::WAVEGENEN | AFECON::ADCEN, true).await;
self.ad5940.sequencer_wait(16*10).await; // 10 us
self.ad5940.sequencer_wait(16*10).await; // 10 us based on SYSCLK = 16MHz
self.ad5940.afecon(AFECON::ADCCONVEN | AFECON::DFTEN, true).await;
self.ad5940.sequencer_wait(wait_time).await; // Determined above
self.ad5940.sequencer_wait(16*20).await; // 10 us
self.ad5940.sequencer_wait(16*20).await; // 20 us based on SYSCLK = 16MHz
self.ad5940.afecon(AFECON::WAVEGENEN | AFECON:: ADCEN | AFECON::ADCCONVEN | AFECON::DFTEN, false).await;
// Rz
@@ -119,15 +128,15 @@ impl ImpedanceSetup {
.dmuxcon(DMUXCON::D5Closed);
self.ad5940.apply_switch_config(switch_config).await.unwrap();
self.ad5940.afecon(AFECON::WAVEGENEN | AFECON::ADCEN, true).await;
self.ad5940.sequencer_wait(16*10).await; // 10 us
self.ad5940.sequencer_wait(16*10).await; // 10 us based on SYSCLK = 16MHz
self.ad5940.afecon(AFECON::ADCCONVEN | AFECON::DFTEN, true).await;
self.ad5940.sequencer_wait(wait_time).await; // Determined above
self.ad5940.sequencer_wait(16*20).await; // 10 us
self.ad5940.sequencer_wait(16*20).await; // 20 us based on SYSCLK = 16MHz
self.ad5940.afecon(AFECON::WAVEGENEN | AFECON:: ADCEN | AFECON::ADCCONVEN | AFECON::DFTEN, false).await;
// Toggle leds
self.ad5940.write_reg(Register::SYNCEXTDEVICE, 0b010).await.unwrap();
self.ad5940.sequencer_wait(16 * 1_000).await; // 0.025 second
self.ad5940.sequencer_wait(16 * 1_000).await; // 1ms based on SYSCLK = 16MHz
self.ad5940.write_reg(Register::SYNCEXTDEVICE, 0b111).await.unwrap();
self.ad5940.sequencer_enable(false).await;