LUMC-bioz/bioz-firmware-rs
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Basic working impedance.

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This commit is contained in:
Hubald Verzijl
2025-08-14 17:31:46 +02:00
parent 03a04bf789
commit bf3f00cfb0
4 changed files with 70 additions and 16 deletions
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11
src/ad5940.rs
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@@ -348,12 +348,14 @@ impl AD5940 {
// Disable fifo
self.write_reg(Register::FIFOCON, 0b010 << 13).await.unwrap();
// self.write_reg(Register::FIFOCON, 0b011 << 13).await.unwrap();
let cmd = 0b101 << 9 | 0b001 << 6 | 0b01 << 3 | 0b01;
self.write_reg(Register::CMDDATACON, cmd).await.unwrap();
// Enable FIFO
self.write_reg(Register::FIFOCON, 0b010 << 13 | 1 << 11 ).await.unwrap();
// self.write_reg(Register::FIFOCON, 0b011 << 13 | 1 << 11 ).await.unwrap();
// Enable sequencer
let mut reg = self.read_reg(Register::SEQCON).await.unwrap();
@@ -395,6 +397,11 @@ impl AD5940 {
Ok((tempsensdat0 as f32/(pga_gain * k)) - 273.15)
}
pub async fn get_fifo_count(&mut self) -> Result<u32, Error> {
let data = self.read_reg(Register::FIFOCNTSTA).await?;
Ok((data >> 16) & 0x7FF)
}
pub async fn init_waveform(&mut self) -> Result<(), Error> {
// Set frequency
let freq: u32 = 1000;
@@ -433,7 +440,7 @@ impl AD5940 {
self.afecon(
AFECON::DACBUFEN
| AFECON::DACREFEN
// | AFECON::SINC2EN
| AFECON::SINC2EN
// | AFECON::DFTEN
// | AFECON::WAVEGENEN
| AFECON::TIAEN
@@ -528,4 +535,6 @@ pub enum Register {
HSDACCON = 0x0000_2010, // High Speed DAC Configuration Register
HSRTIACON = 0x0000_20F0, // High Speed RTIA Configuration Register
BUFSENCON = 0x0000_2180, // HIGH POWER AND LOW POWER BUFFER CONTROL REGISTER
FIFOCNTSTA = 0x0000_2200, // Command and data FIFO internal data count register
ADCFILTERCON = 0x0000_2044 // ADC Output Filters Configuration Register
}